The present invention relates to a driver circuit. More particularly, the present invention relates to a half-bridge driver circuit.
Electronic circuit output stages which employ two power transistors stacked in series between two supply rails (i.e., in a so-called "half-bridge" or "totem-pole" configuration) require a driver circuit to drive the two power transistors out of phase. Such output stages are commonly used, for example, to pulse width modulate inductive loads in motor control and switching regulator applications.
Driver circuits for the above and other applications must satisfy various requirements. First, the driver circuit must ensure that both power transistors are not ON simultaneously. Otherwise, a low impedance path may exist between supply rails, giving rise to undesirable "shoot-through," or "cross-conduction," current. Shoot-through current can cause a reduction in power efficiency since it represents supply current which has bypassed the load. Additionally, in a worst case, shoot through can cause power transistor failure due to current overloading. Therefore, a driver circuit should desirably minimize the amount of time and amount of current that both power transistors conduct simultaneously.
Second, a driver circuit must provide sufficient bias voltages to both power transistors. In other words, a driver circuit must provide large enough drive voltages to the drive terminals of both power transistors so that they are capable of operating under their respective optimum bias conditions. Otherwise, power dissipation in the power transistors may increase, giving rise to a reduction in power efficiency of the overall output circuit. Therefore, power transistors in driver circuits should spend minimal time operating under non-optimum bias conditions.
In view of the foregoing, it would be desirable to provide a driver circuit capable of driving two power transistors stacked between two supply rails without the problems associated with shoot through or cross-conduction currents.
It would also be desireable to provide such a circuit without the problems associated with driving the power transistors under non-optimum bias conditions.